Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by shitu_khairnar

  1. S

    How to design pad ring for Two stage opamp

    Hi, My layout size is 70um x 70um. and it has 6 pins. 1-gnd pin, 1-Vdd pin, and other 4 are signal pins. plz help me in pad designing. I am new to this. Plz tell me what should be Pad size and all the things needed. Thanks..
  2. S

    How to design pad ring for Two stage opamp

    Hi, I want to design a pad ring for Two Stage OPAMP in Cadence. Can anybody plz help me to design a padring. I dont know how to design of padring. Thanks
  3. S

    simulation of 2 stage opamp in cadence

    Hi, Yes, I already designed the opamp. only the thing is, I dont know how to simulate it on Cadence 180 nm tech. I dont know how to find its gain and all the things in cadence.
  4. S

    simulation of 2 stage opamp in cadence

    Hi, I want to simulate a 2 stage opamp in cadence. Can anybody plz help me? Thanks
  5. S

    cmos 2 stage opamp designing in cadence

    I want to design CMOS 2 Stage OPAMP in cadence in 0.18 µm. plz give me an example of it. can anybody help me?

Part and Inventory Search

Back
Top