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Recent content by shashialabur

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    Implementing JTAG cable from Xilinx for CPLD

    parallel port settings for jtag to work Thanks for all the help guys ! Made the programming adapter as per the schematics posted on this forum, downloaded the 650MB ISE Webpack from Xilinx and everything worked like a charm to program the Xilinx devices on board !!
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    [SOLVED] Regarding EMI shield problem

    Ashutosh, there are many facrtors to be considered for the EMI issues while designing a board. An EMI shield may not be required at all if the board is designed properly. 1. PCB is 2 layer or 4 layer or more ? 2. What is the frequency of operation for the intentional radiator ? 3. What are the...
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    Implementing JTAG cable from Xilinx for CPLD

    tms cpld Hi Mosi, Do you have any links where I can get a smaller file size to download ? The ISE Webpack or the Foundation are 900MB downloads ! I only want to program the CPLD - that too only XC9572 device - and not really do the entire design process for the whole family of Xilinx devices...
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    Implementing JTAG cable from Xilinx for CPLD

    how to use jtag download to cpld xilinx Hi I am going to use the XC9572 device for the first time. I have the required JED file and I just need to program the XC9572 device using the JTAG port on my board. I will make the parallel port programming adapter using the 74HC125 IC as per the pdf...

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