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Thanks guys!
I guess by better I meant in terms of resource. I know both designs work and well written. Given all information, would I choose the design with less FF or LUT was my question. vGoodtimes's answer of FF being low-cost/free makes sense to me and is in the direction I want. In my...
Thanks TrickyDicky.
A and B are completely different designs trying to achieve the same thing. I do understand that the clock, DSP, BRAM etc are important constraints/meterics.
Maybe paraphrasing the question: Which one A or B would fit first in a resource constrained device? Assuming A...
Better resource utilization measure LUT vs FF
Hello,
A basic question here. If two designs A and B get synthesized and result in a utilization report of:
A: x LUTs and y FFs
B: x/2 LUTs and 2y FFs
Which one would be a better design and why?
Cheers!
Hello,
Is there any way that I can synthesis my design using all the 8 synthesis strategies(optimized area, performance...) available in Vivado and have one synthesis report for each? Now the following TCL is the command that starts the synthesis.
start_gui
open_project...
I like your method.:clap: But in my case switching to that kind of memory configuration will add unnecessary addressing complexity and additional modules. Thanks!
Your approach is ideal if you have fewer number of samples. In my case, the RAM is 62500x16bits containing image pixels and I have a minimum of 64 PEs. If I changed the dimension to what you suggested, the RAM will be 64x15625. How can you have such a RAM, I don't think it is feasible?
Another...
Hi folks,
In my design I have N(could range from 64 to 1024) number of processing elements, each PE taking x samples at a time. I would like to feed all N PEs and trigger their processing at the same time from a single on-chip memory. I tried designing serdes-like module which reads the memory...
Hello,
I am having an issue in combining two clocks signals in one project. I am using DE2 Altera board. I am also using Nios processor. So, basically I am trying to merge to independently working projects into one and build my thing on it. I have one clock signal 50MHz for one project and I...
I would like to assume the worst possible environment so I can consider all the possible challenges and make a generic solution. For example an indoor environment with lots of partitions and lets assume we want a robot to clean each partition by moving from one to the other. So we would like to...
Hi y'all,
I was looking for the best and accurate way of locating a moving robot in an indoor environment. I have seen some technologies using WI-FI, RFID and bluetooth to measure the signal strength and calculate the distance from it. I would love to hear if anyone of you had done something...
Hi Chucky, thank you for your reply. This is not for calibrating a CRO. This is to see a sampled signal given a sinusoidal wave form. So, I gave the sample and hold circuit output for X and a sawtooth to Y. Then as I mentioned I got a sin wave again. Now, how I can I interpret the sampled signal...
Scale reading XY plot Oscilloscope
Hello,
I have a sawtooth signal driving the X(period of Ts, k ms/div, m V/div and slope of A volts/sec) and Y driven by a sin wave (1 Hz, 1Vpp, B volts/div, p ms/div). It is clear that I will get a sin wave in XY plot. But how can I read the division(both...
Hi,
I was wondering how we can read an XY plot regarding scaling.
For instance if I drive X by a sawtooth (period of Ts and slope of A volts/sec) and Y by a sin wave of(1 Hz, 1Vpp, B volts/div), I will of course will get a sin wave in XY plot. But how can I read the division(both time and...
Yes it is 16K FFT report. The thing is I had very large shift registers build from LUTs which made my synthesis very very slow, to be exact 8+ hours. Then I noticed that and changed it to RAM bases shift registers, that makes the RAM usage high but now I can generate my programming file in...
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