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I am trying to decide location of AC coupling capacitors between FPGA and PHY SGMII interface and datasheets of neither part has any useful information.
I've read some notes, like this one (http://www.sigcon.com/Pubs/news/7_08.htm) from Dr. Howard Johnson and some other posts where people...
Hi,
I was reading OnSemi's AN8173 app note and couldn't understand why common mode voltage of AC coupled line is equal to VTERM.
My thought was each input of the receiver will swing between VTERM and VTERM-400mV, thus the common mode would be VTERM-200mV.
I think there's something I am missing...
Hi all,
I am working on a multi-board design where a simplified block diagram is shown below. The FPGA's transceiver block uses 0.95VDD and PHY uses 3.3VDD. So I need to use AC coupling caps to route SGMII between the FGPA and PHY. Data rate is 1.25Gbps and traces are impedance controlled...
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