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I am not sure how to execute this process with rising_edge(C)
cnt_proc : process (edge, toggle)
variable cnt_v : natural range 0 to MAX_CNT := 0;
variable last_v : std_logic := '0';
begin
if toggle /= last_v then
last_v := toggle;
cnt_v := 0;
elsif rising_edge(edge) then...
I updated the code with synchronize process. Please let me know is it the right way of synchronize.
library IEEE;
use IEEE.std_logic_1164.ALL;
use IEEE.numeric_std.ALL;
entity fcnt is
port (
C : in std_logic; --- clock 50mhz
S : in std_logic...
Which signal is your external pulse?
S is the external pulse
Which one is your internal clock?
C is the internal 50 Mhz clock
Why do you have those variables in the second process outside the clock ?
second process is based on toggle and external pulse. not based on the internal clock.
It's...
I need to count the external pulse coming on to FPGA.
Total time i take to count pulse is 5 sec.
internal clock is 50mhz.
external pulse duration is around 0.5 sec to 1.5 sec. so i am calculating number of pulses for 5 sec.
last 5sec pulses needs to be updated on 8 bit LED's.
not working...
Check the following code which recieves data from serial port and on/off LED interfaced with FPGA. This one help you to write your code.
Spartan-6 FPGA interface with UART Code
Simple method to transfer data from FPGA with EDK software is UART. Send the output data through Xil_printf command. Create Matlab GUI to construct image from 1D to 2D array.
You can't use byteblaster to program xilinx FPGA. Instead you can buy DSJTAG from seeedstudio. It is very cheap to get both devices working.
To know different methods of configuring FPGA here
In Xilinx Platform Studio, MPMC ip core is avaiable to access ddr memory. It implement Microblaze interfacing with MPMC core through PLB. When you point your linker script to DDR2 memory.
You can store image as array and do image processing algorithm.
What are the voltage you are providing to FPGA?
Did you check individual voltage for shot circuit before Powering?
Also provide information on IC package and did the board work previously ?
Original code don't have any specific timing info on input signal High/ Low.
For example:
if you have reset signal you must specify in you testbench like
Reset <= '1';
wait for 10 ns;
Reset <= '0';
wait for 10 ns;
original code only say
reset <= '1'
do this
else
do that
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