Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by Savankumar

  1. S

    Unattached port label

    Thank you so much Barry. This problem I am observing for few Pins only and still, I am unable to find out the solution. I checked a couple of times all the pins and they are at appropriate place only because there is no error for LVS. Will the warning matter if we use this layout at other...
  2. S

    Unattached port label

    Hello, I am working on the layout in the Cadence environment. I am facing a warning for a few of my input pins: Warning: Unattached port label Anyone has faced a similar kind of warning? What should be a possible solution? I already checked my pins and they are attached in the layout at...
  3. S

    How to measure the gain of LDO in cadence

    Hey Team, I am designing the Low Voltage dropout regulator. My input voltage is 2V and the output required is 1.2V. I used a two-stage op-amp as my error amplifier.PMOS devise as pass element. I am measuring my gain between y and input as shown in my diagram providing ac signal at the input...
  4. S

    [moved] Design of SAR ADC in Cadence

    My simulation was running and after simulation was done I was unable to plot my outputs so I checked the warnings and there I found out about that check output log for more details about the error. I am just able to deal with this error. It was a problem with my AMS config. So I tried again and...
  5. S

    [moved] Design of SAR ADC in Cadence

    Hey Team, I am designing a 4 bit SAR ADC using the charge redistribution method for the dac circuit. I am facing errors while doing transient simulation. When I checked the output Log menu, I found out two errors: 1) xrun/CUVHNF 2) ELBERR Does anyone face this kind of error? Any kind of...
  6. S

    Design of SAR adc using charge redistribution method

    Hi team, I was designing 4-bit SAR ADC in cadence. While designing I am facing problems for connecting my 4-bit output to the 1-bit noConn. Can anyone suggest me how I can connect it? If I am connecting it simple way, I am getting the warning for short-circuiting and if I give a name to that...
  7. S

    Problem in Designing of SAR ADC

    Hi team I am designing SAR adc . I am finding trouble in designing switches in dac charge redistribution circuit.I am using cadence virtuoso and I know that I can use the direct SPDT switch from analog lib,but I want to design it by using mosfets. Can anyone help me in this task? I am designing...
  8. S

    Design of Comparator

    hello I am designing comparator using push-pull topology in cadence atmosphere. Can Anyone explain me how to do resolution calculation and how to simulate it? Thank you

Part and Inventory Search

Back
Top