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Recent content by Saraparisa

  1. S

    phase wrapping, either 1 or 0 in VCO

    Hi How can I have VCO with phase wrapping, either 1 or 0. If I have Verilog-a model of VCO and I set fc (free running frequency) at 0 and Kvco at lets say 100e6, while the input voltage of the VCO is a pulse (between 0 and 1). Does it mean that I have a vco with phase wrapping, either 1 or 0...
  2. S

    Voltage to time converter

    Hi I was wondering if anybody can tell me how to define the gain of a voltage to time converter (VTC). Let me explain what is in my mind for more clarifications. I ma using a PWM generator as a voltage to time converter in the SIMULINK. Put me right if I am wrong! A VTC plays a role a simple...
  3. S

    phase of the gated ring oscillator

    Hi, I attached the schematic of a gated ring oscillator and its timing and phase diagram. Having had this figure I have two questions. First of all, can anybody describe the phase behavior of the gated ring oscillator? How does the oscillator start oscillating from the initial phase at the...
  4. S

    Attenuation of the fundamental on a Sigma-Delta ADCm

    Hi But you know the decimation filter in the I-ADC is different from conventional one. As long as you don't reset the DSM you probably cannot figure out if it works perfectly with ideal SNDR. That's why! Tnx
  5. S

    resettable ring oscillator

    Hi SunnySkyguy , Could you please explain more? Do you have any reference or paper for that? Tnx,
  6. S

    Attenuation of the fundamental on a Sigma-Delta ADCm

    Hi Mark, But your PSD does not show it actually works as an incremental ADC. Are you resetting your integrator?
  7. S

    resettable ring oscillator

    Hi, I wonder if you come up with an idea!:shock::idea: "resettable ring oscillator". Does it make sense?:bang: Would you know if it is feasible to design a resettable ring oscillator? If so, how to do it? How does it work?:razz: Best,
  8. S

    Ring-oscillator Verilog A

    I designed 5-stage ring oscillator with CMOS inverter and it works perfectly as you can see in the attachment. I have no problem with that. Then I replaced each CMOS inverter with Verilog-A inverter. Ring oscillator oscillates but something is weird with the output of each inverter. I have no...
  9. S

    [Moved]: Gated Ring Oscillator (GRO) in SIMULINK

    Hi, I have simulated a VCO in the SIMULINK as you can see in the attachment. What I want to do is just to modify this simulink such that it behaves like a GRO ( Oscillation when the input signal is 1, freezing the output when the input is 0)...
  10. S

    [Moved]: Gated Ring Oscillator (GRO) in SIMULINK

    Hi there, I am going to implement a GRO TDC in the MATLAB SIMULINK. Does anybody know how to simulate it in the SIMULINK? As a matter of fact, I am going to drive the GRO with a PWM in the SIMULIK. any help would be greatly appreciated.

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