Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I think you should consider inserting BUFG & IBUFG's.
If it is Virtex-5 Development board then your vendor might be providing you a reference DDR2 controller.
Please consider to check it.
Is it available in Verilog. Could you upload the the verilog version. Looks like singe precisions, do you have double precision FPU.
How many cycles will each function takes to complete?
For OFDM timing sync, you can use moving average over GI. Write your own code and decide for how many symbols you need to calculate. This is coarse timing sync
Once you get the peak then you find the corase frequency sync.
SD Card Controller
https://opencores.org have working SD Host controller. With litle bit updates you can use for your design.
U can try for Denali model for your simulations
Multi core Processor
what kind of tool set(vendors) available for Multicore?
What kind of architcture is more appropriate for Multicore?
Can you give some references?
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
