Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by saied_157

  1. S

    how to measure leakage current or leakage power using HSPICE

    Hi I am in such situation. I would be thankful if you say how did you handle it? What HSpice code you use for gate leakage current? Thanks in advance --Saeid
  2. S

    Hspice finding gate leakage current

    Hello everyone I want to find gate leakage current in 45nm cmos model. I have found some sample for calculating leakage current but they are not work correctly. Here is my code: spice deck .inc '../NMOS_VTL.inc' .inc '../PMOS_VTL.inc' .inc 'AND2_X1.sp' vcc 1 0 1 v1 vs 0 1 v2 vd 0 0 X1 vs vs...

Part and Inventory Search

Back
Top