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In systemverilog I know class object are passed by reference, all other entities are passed by value.
so I dont need to use "ref" keyword in function argument list e.g.
function void (TX _tx);
endfunction
But what if I explicitly say function void(ref TX _tx); what will be...
Thanks for the replay, but the "fact" function is defined in C, not SV, so import is enough.
I figure out what I need is to add an ' extern "C" ' in front of any C function. that fix the problem
type in the code as in the book, but could not pass compile:
here is the code:
//file: test.sv
import "DPI" function int fact(input int i);
program automatic test;
initial begin
for(int i=1; i<=10; i++)
$display("%0d! = %0d", i, fact(i));
end
endprogram
//file: test.cpp...
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