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Yeah, I know. Is there something simpler and cheaper that anyone knows of? chemelecs circuit looks good, but I just don't have the time to knock that together at the moment.
With a charger like this, is it possible to put >1 battery on a bank, with diode isolation, or would this allow only 1 batter per bank?
**broken link removed**
Would love to but no time at the moment for a project like that. Thats why I am asking if there is a charger I can buy where I just leave all 6 on it on a float. My physics teacher at school built a simple system like that and stored all his batteries on it, just a trickle charge but kept them...
I bought 6 12V lead acid batteries, 7.0Ah. The project I want to use them for has not materialized yet so they are just sitting around my workshop. I feel like I should have them on a float charge to keep them in good condition? If this is the case, where can I buy a charger that will keep all 6...
Hi,
I get what you have done; put 4 fifos together side by side to achieve what I was trying to do with my original design. Much better! Thanks for that.
Rupert
Hi,
I found the option to disable use of a block RAM. Thanks for the pointers to it. However, now that error is fixed, it has reverted to the error I was getting previously about signal connect to multiple drivers:
ERROR:Xst:528 - Multi-source in Unit <fifo> on signal <array_reg<15><7>>...
I retract my earlier scepticism on the for loop. Also, your trick of using a size instead of a bottom index was also necessary. This seems to be accepted:
integer j;
always @(posedge clk)
if (wr_en)
for (j = 0; j < CHNK_FACT; j = j + 1)...
I'm not so sure about your for loop? I thought for loops are not synthesizeable and a generate loop is? As I understand it a generate loop is a bit like a macro to save on typing, and is elaborated before synthesis. Hence my confusion about the hand unrolled versus generate loop being different...
Hi,
I'm trying to produce a variation on a FIFO, that lets me consume less than the input width of the FIFO on the output end; between zero and the full width. The width of the FIFO is a multiple of a word size, and that multiple is a parameter to the module. In order to map the read and write...
To follow up and complete the thread... I tried again with clear film and it worked much better. 3 layers, mirrored so the ink side on the bottom layer is right against the board. The etched board is beautifully sharp.
Thanks. I did agitate while developing, but it definitely does not come off by itself.
Do you print your designs onto clear film? I used drafting film which takes the toner well but has a matt finish and is not a clear film. I'm wondering if I should be using clear film like is used for...
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