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Current-mode will help you to operate at a very low supply voltage like 2.5V. A low-voltage cascode current mirror topology will help more and improve PSRR.
Can you use external component like resistor? If so, you can use band-gap voltage (3~5% variation for all case) and a external resistor (1% variation).
Re: mixed signal IC?
Noise isolation is important issue in mixed-mode chip. You have to face boundary and pin arrangement problems. ESD design is a big challenge as well.
Re: pin assignment
Yes, it is good way to isolate analog pins from noisy digital pins by ground pins, but it is not necessary to seperate supply pins from ground pins. You can just place supply/ground pin to be close to large current paths.
Re: Transistor Model
You can read HSPICE manual to get their difference.
As a IC designer, usually we can't deice which model is used because it is provided by foundry.
Re: I/O Pads (with ESD)
You can use a big diode for the first-stage ESD protection and employ a series resistor and a local small diode for the second-stage ESD protection.
Re: Low Volatge Analog IC.
Adding to current consumption increase, I think more area is needed to realize low voltage requirement like rail-to-rail and uniformized gain.
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