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Dear Vishwa and echo47
Sorry to express my appreciation so late since I'm on business last few days.
Thank you for your positive suggestions, especially Vishwa's insistent help and support to make my problem solved more quickly than expectation.
All the best. :)
Best wishes...
Dear Vishwa,
Thank you for your kind help.
yes, I want the replica of the PWM signal at the output after some delay (several microsecond), it's could also deemed as the delayed version of the pwm signal.
Thanks.
Regards
Robert Zhan
Dear Vishwa
Thank you for your kind help. However, it still doesn't meet my request. The timing edge is not very precise and pwm signal after delay has been affected. The attachment gives the figure to show my aim. Could you tell me how to modify the routine to ensure the delay time and...
Dear all,
I'd like to make a routine to have a delay for PWM signal, about several microsecond, just like the hold on function. But it emerges the following error:
Error: VHDL error at soft_switching.vhd(70): can't infer register for signal "p01:counter[0]" because signal does not hold...
altera_io_begin what is
Just as title, I have to detect two rising edge and write the routine as follows. When it was compiled, there is error:
Error: VHDL error at soft_switching.vhd(69): can't infer register for signal "counter[0]" because signal does not hold its value outside clock edge
I...
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