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Recent content by roadrunner

  1. R

    How to implement the WFQ in hardware?

    weighted fair queue Anyone know how to implement the WFQ in haraware or I can find some detail info to design it ?
  2. R

    any x-server soft. can anyone help?

    Try VNC , it's free and small size!
  3. R

    SystemC , Systemverilog , vera , specman...

    history of verisity specman Hi All : For those languages which is suitable for verifatin engineer need to know! Do't tell me all of them , This wil kill me! Any commend! rgds roandrunner
  4. R

    Any books regarding to systemC

    Did anyone have the books regarding to systemC!! Can you uplaod? rgds roadrunner
  5. R

    dual port fifo with two different clock input

    I know this issue is kind of old? but anyone can provide some suggestion to design a dual port fifo with two different clocks input ?
  6. R

    best verilog lint tool

    spyglass linting tool The Avanti RtlExplore is better ! I use it to check my RTL code , it show some messages that help me to solve the FPGA synthesis issues (FPGA synthesis tools give some clueless error message) !
  7. R

    AMBA bus model - looking for it

    free amba master evc Does anyone know, where can i get the AMBA AHB bus master/slave/monitor model from Syn*psys? TKS!!
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