Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by reasonable

  1. R

    SPEF PT flow - want to do STA in primetime at two coner

    SPEF PT flow I don't think corner information is included in your nxtgrd file. And I think STA use corner information (if it can) to calculate only gate delay, so the corner information is possibly ignored in interconnection delay calculation.

Part and Inventory Search

Back
Top