Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I designed an integrated wide-band LNA from 0.1GHz to 5GHz, NF and S parameters are good enough for requirements. However, I need to reduce power consumption without degrading LNA perfomance (NF and S parameters). How can I optimize LNA's power consumption?
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.