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Recent content by ramya19

  1. R

    opamp design - bias current of 10uA Vsupply=3.3v.

    opamp design I am trying to design an opamp. I have supplied a bias current of 10uA Vsupply=3.3v. 10uA is flowing through the diffpair branches (current mirror as well as input pair) The problem is the input pair transistors are in cutoff and all others are in saturation. Please suggest me what...
  2. R

    MOSFET sizing (channel length) in cadence

    MOSFET sizing Placing transistors parallelly will only increase the width of the transistor but not the length. To increase the length the transistors (fingers) have to be connected in series in concept . To check the max length you can get for a transistor you can check in the cdf callback or...

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