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If you are talking about simple gates or simple path below might be helpful to you.
Delay has two components = Effort delay + Parasitic delay
D= F+P
where,
F= g*h ('g' is logical effort,'h' is Electrical Effort)
g = Capacitance of diffusion/ Capacitance of reference...
In the PC world, I believe "central" DMA refers to a single DMA controller chip (8237 I seem to recall) that is used for all DMA transfers on the bus not performed by the CPU.
In a PCI system, due to the bandwidth of the various devices and level of IC integration, DMA controllers are...
I see you are new to this forum.
As per my knowledge, no one in this forum will give you the code or help you to finish your assignments. You should give a shot. If you stuck somewhere in the middle, people will help you for sure.
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