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It appears that you have not set the undefined line width parameter.
Set the un-defined line width value to > 8mil i.e. say 10 mil.
Check whether your apertures are ok. For that click on apertures --> Edit --> Select apertures without rotation. then click ok.
Ensure that you select RS274X...
creepage and clearance
According to IPC a 0.5mm wide copper trace and having a thickness of 1/2 Oz, running on the external surface of a PCB at room temperature is capable of carrying up to 1 Amp of current. A 10 mil trace might carry only 0.5Amp if the trace is on the external layers...
Re: Coils on the PCB
One simple way is to place the ferrite chokes next to one another and add a GROUND GUARD BAND between both of them, with the band/ copper connected to the chassis ground. This may reduce the coupling to a certain extent.
Placing common mode chokes one next to the other...
how to perform netlist check in orcad capture
The schematic Symbol (Orcad Symbol) pin has two properties, one PIN_NAME and another PIN_NUMBER. You might have ended up giving only the PIN_NUMBER property on the schematic symbol and not the PIN_NAME. In your case, the pin number would have been...
Lead free packages have a different finish compared to the lead based ones, to comply with the envoronmental directives like RoHS. Other than that, lead or no-lead does not make a difference to the package size. All the package sizes are controlled and governed by the microelectronic standards...
Re: PCB Material
I guess, you are trying to choose a PCB material with a lower glass transition temperature. If you are doing so, then please keep in mind about the assembly temperatures to which your board would be subjected to. The lower the glass transition temperature, the more would be the...
Re: Groud Plane capacitance
Well, I dont see any strong reason for the ground layer and the adjacent layer's interlayer capacitance to delay the digital signal output from the TTL gate pin.
As long as the pcb stack is correctly designed and impedance properly controlled and the critial lengths...
Re: Orc@d padstack question
You can create a copper area and place the through hole padstacks inside the copper area (not copper pour) and create a customized pad and thus, a customized footprint.
Re: GROUND SHORTING
Before I try answering your question, what is the reason for shorting both the power supplies??? I have heard about shorting the grounds.
I guess you are trying to short the grounds of +5V and +24V together, then the best place for your to short them is at the power supply...
I am not sure if Capture CIS schematics can be translated to Concept HDL. There are no translators available on the web. However, you can get if you are a CADENCE customer, then, the customer support has the necessary translators to do the job for you. As such the translators are not available...
Friend,
yes..this is a problem faced by many while generating negative artwork layers in 274X format (600x in Allegro). Because of the problems with the IPOS and INEG commands, I guess, the negative plane layers are created as 3 separate composite layers. The best bet to overcome this problem...
thermal relief in orcad layout
I guess this problem is solved in Orcad 10 series software.
The best way to get out of this problem is to add copper cut out areas wherever you have those acute angled copper pour projections.
One more way is when you send the gerber files to the manufacturer...
Re: Copper Pour In Orcad
I think many of us have a misconception about copper pours.......
Copper pours are used mainly for the purposes of
1) Providing low imedance paths (remember that area is inversely proportional to the resistance i.e. impedance)
2) For heat-sinking : Copper poured...
To put in a layman's language, power plane provides for a dedicated layer which is solely meant for a robust, un-interrupted and low impedance power distribution system on the Pcb, whereas ground plane as the name suggests, provide a good reference to the signals on the pcb and a low impedance...
You can do that in Mentor Board station i.e. assign shield nets. In Allegro, I doubt very much whether we can assign shield nets to the existing nets. But, one way out is, you can export the allegro database to Specctra and then do the required.
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