Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by psheldon

  1. P

    Very Low Jitter PLL Design

    I have been tasked also to do a low jitter PLL in 130nm. You can't quite get there with a Ring VCO unless you burn tens of mA in VCO current. You will probably need a spiral inductor osc with thick top layer metal.
  2. P

    ade defining output variable and re-using within another out

    I am using Cadence ADE and would like to define an output variable then re-use it within another output description. How do I do this? I know I can use a Design variable such as VDDA using: VAR("VDDA"). But how do I re-use an output variable name?

Part and Inventory Search

Back
Top