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Re: gate count
Usually, NAND2 gate is used to calculate the gate count of a design.
Exp,in smic library,1 NAND2 = 9.98 um*um. So if your area report from DC is N um*um, then your gate count is about N/10.
Usually there are two methods:
1.Add spare gates in RTL code by designer. It depends on the confidence of his design for a designer,such as addtional flops for improving FSM later.
You can define a common spare cell module,and instantiate in your design.
2. Add spare gates in netlist directly...
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