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I am having 14 bit ADC data which is in 2's complement format.
I require to convert in 5 bit format using vhdl language. What is the easiest way of doing it apart from using if then else statements comparing magnitude?
Consider the input data to be in two cases unsigned and signed.
I am working with gnss sdr software for processing rf signal captured in file.
In gnss sdr software configuration the data source mentions adc sampling rate and type as i and q samples. Nothing is mentioned about IF frequency. Does that mean the intermediate frequency is always zero for I and Q...
Yes I understand that but if i read the adc output as unsigned number, the waveform is sine wave but if I read it as signed integer, the output waveform seems to be distorted.
Hi I am using ADS62p49 14 bit adc which supports LVCMOS and LVDS output. I have a low sampling requirement of 30MSPS hence I am using LVCMOS type output in 2's complement form. When I give 10dB sine wave input to the adc, I get a sine wave digital output with dc bias.
Similarly when I am giving...
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