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Recent content by preety

  1. P

    designing 4 bit processor in verilog

    hello!!! I am working on verilog.. i am having problem in instantiating a module from conditional statements. for eg: if (ren) decoder (i0,i1,en,d0,d1,d2,d3) can someone help me
  2. P

    designing 4 bit processor in verilog

    thanks alot...i m new to this topic so plz can u elaborate..
  3. P

    designing 4 bit processor in verilog

    hello, my btech project is designing 4 bit general purpose processor supporting instructions mov,add in verilog......i m not getting how to design register file and sram in verilog. can anyone help me plz..
  4. P

    image processing using verilog!!

    hello!!!!!! will u plz suggest me any other book.....
  5. P

    image processing using verilog!!

    hello dmk!! i also want to do a final year project same as tarun..i went thru ur replies but had same problem!!! i was unable to download the book!! its a kind request if u can mail me the e-book!! "design recipes for fpga" by peter wilson!! my mail id is preeti.extc@gmail.com

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