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Ok I will try this. From my previous reply I have attached a graph which shows the output common mode voltage. How can I shift the graph to the right? I want the output common mode value to be around 900 mV for input of 0.3 to 1.4V. Atleast thats what is in my specification. If this is not...
Hi
Thank you very much for the suggestion. I tried the simulation with the dimensioning mentioned by you. I achieve a output common mode value of around 900m but my gain suffers now. way less than 40 dB. I am not sure how you got 47 dB with your simulation. I am using the exact same dimenisions...
I am referring the design prcoedure from Philip Allens textbook from chapter 5.2.7. I am designing a single stage OTA with differential amplifier and current mirror load. My specifications are below:
DC Gain Av = 40 dB minimum
Gain-Badnwidth = 40MHz minimum
Large signal cut off frequency 200...
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