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Recent content by pratapmalvi

  1. P

    PVS rules for gpdk180nm

    Yatin, if the cadence is installed in ur PC ...need to go to cadence or cad file then PDK then there will be foundries name then select the 180nm technology and docs...u will get related documents example: cad/pdk/GF/180nm/docs
  2. P

    Assura LVS issue with IBM cmrf7sf

    Possible solutions: 1. Make sure pin name in Schematic and layout are same...if u r using capital letters in schematic then layout pin also same as schematic. 2. Make sure pin connection in layout should be at the top most level. If the pins are in bottom level it will not work at top level...

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