Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi arun,
Yes its in verilog.. i dont know the reason y u wanted to do in VHDL.. but generally Verilog is used mostly in industries..
Probabily u can try to convert verilog to vhdl manually or try to get some tool if ur in un avoidable situation
all the best
Pradeep
Re: USB Core Query
Hi, Lucbra,
Thanks for your reply, i already posted the same query in opencores forum but i did not get any replies. so i came here.
so any more suggestions or comments from ppl around.
Thanks in advance
Pradeep
Re: USB Core Query
hi bapodradhairyab,
Thanks for the reply, i knew that open cores is for learning purpose but i wanted to know if i use it in our product, will it be illegal ?
Thanks
Pradeep
hi arun what kanmozhi has suggested is the right one.. i dont know y u cant get a code there its readily available
here
https://www.opencores.org/project,usb
Regards
Pradeep
USB Core Query
Hello PPL,
I have a wague question. can i use the open cores code for my final product, will there be any royalty or any other issues related?
we have a requirement of using the USB 2.0 CORE, as IP CORE from Vendor is costly.
comments are invited
Thanks in advance
Pradeep Kumar
Re: Non Linear ADC
Thanks for your reply,
these are our finer reqirements:
Since our application is a hand held device, the size becomes a constraint but we can afford if it is small.
We are looking for 16 bit resolution ADCs(0 to 3.3V). Nature of our input distribution is most likely in 0...
Re: Non Linear ADC
Thank you all for your valuable input,
our specific requirement is as follows
our application has to sample an analog signal which varies from 0-3.3V, but it is more likely that the signal will be in the range of 0-1V, hence we need a finer resolution in...
hi ppl,
I have tried to search for non linear ADC from TI & AD, but i did not get any.
is there any company that provides us with non linear ADCs ?
please help me in this regard
Thanks in advance
Pradeep
Hello Folks,
I am a newbie in Board designing, i need help in understanding how to interconnect or interface an ADC with an FPGA (Spartan 3A DSP chip).
i dont have any idea as to how it is done..
Please can any body give me relavent information or sites or documents which help me with this...
system verilog classes in bangalore
Hello Madam Ajeetha..
Thanks for your valuable inputs as to what a fresher can expect.
first i should thank both Mr.Sreenivas & you.. i have been listening your names from past many days even at SNUG 09 too.
i did not intend to write anything wrong about...
systemverilog aug 2009
Hi vivek..
Thanks for your info..i knew the info about CVC..the course they offer is good but costly a bit..so tying for some other alternatives..there are some institutes like
Accel accademy:www.vlsitraining.com
IIVDT: **broken link removed**
even i am enquiring...
hello gmailbond
what ever saurabh has said is absolutly correct. STA only deals with Timing analysis of ur circuit and CTS is w.r.t inserting the clock tree in to u r design and it (The goal of CTS) is used to minimize skew and insertion delay.
Thankyou
Pradeep
front end and back end of vlsi design
Hello shivapugal
as far asic design flow is concerned u can see this link and try better searches in GOOGLE
https://users.encs.concordia.ca/~tahar/coen7501/notes/asic-notes.pdf
hope you find this information useful
thankyou
Pradeep
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.