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Recent content by Pootle

  1. P

    lvcmos33 io maping fails while lvcmose 25 pass(ise8) why???

    lvcmos33 The voltage thesholds for LVCMOS25 and LVCMOS33 are different. Possibly signals are failing their setup and hold times? Can you specify a slower clock before you compile? Alternatively, are you trying to specify LVCMOS33 on a bank which does not support it?
  2. P

    Grounding - should digital and analog ground be isolated?

    I'm designing a high-speed mixed signal (100/400MHz) board and am following the advice of the esteemed. Dr. Howard Johnson. From his excellent Signal Integrity website: **broken link removed** **broken link removed** **broken link removed** In particular the first link describes an...

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