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Yes I can understand, I have the algorithm, and i am reading and trying many tutorials to draw circuit diagram from the algorithm, so that only I can write the verilog code correctly. But I cannot get the clear idea of how to draw circuit diagram and write synthesizable verilog code from/for...
Thank you for the reply. BTW, if u is a 16-bit register or more, can we follow the same method?
Also i need this condition in a while loop but while is not sysnthesizable, how to proceed this.
For example, So until if u!=1,it need to do some operation and when u become 1(u=1), it need to do...
I am writing verilog code for modular inversion algorithm, how write synthesizable verilog code to check a value inside the register is one(1) or not? kindly help on this.
for example if register u=1, then it should return TRUE/some other operation to be continued else FALSE.
how to do for this.
Thank you so much. Yes I got basic ideas of hardware oriented coding style.But i am not able to start coding like hardware. I am confused where to start an all. Can you give me an example of how to start it by writing code for this binary euclidean algorithm. FYI i have attached the algorithm here
Thank you. yes exactly, I am not having that much concrete knowledge on synthesizable verilog coding. really sorry for wrong coding(usage of while loop in always block).
What is meant by unrolling the loop.Can you please give me an explanation/ example?
Also please suggest me a good place to get...
To find modular inverse value, I found the availability of Binary/Extended Euclidean algorithm.I have written the synthesizable code for this algorithm. But while i execute the testbench, I cannot get the output and also its got hanged-on and i need to power off the system without proper...
Thank you. Yes UART transmission is sufficient for my work, but I want to know how to implement using it and the procedure to implement using UART transmission. FYI I know how to implement using JTAG and iMPACT tool of Xilnx. I am not aware of UART interconnection in it. Looking forward for replies.
Thank you for replying. But what about Chipscope pro tool of Xilinx. Can any one advice for this tool for my purpose. whether my guess is correct or not.Pleas suggest me.
Hello all,
I have xilinx fpga board, To burn 256 bit adder into FPGA, how should I access input and outputs. It means for 4 bit adder I can give input through dip switch and can see output through LED, for which I need to connect through JTAG cable only. But for higher bits, What should I do...
Thank you for the lookup table clarification. But in my application I don't wish to store the values previously, because I am working on a security oriented algorithm. So what I need is a synthesis-able verilog code to find log value for which I have to give 'n' as input and need direct...
Yes,that's not a problem that I will get only integer part. Exactly,what I am trying to do is I programmed in C program. Since I am very much new to verilog, kindly help me to convert that program into verilog from C program mentioned in previous posts.
Thank you for replies. I need to calculate log for a particular given input value. So I guess lookup table method is not need. Yeah I got the solution some how but the thing is I want to write code for it in verilog. also i need for unsigned integer.
I can write it in C programming but i dont...
Hiii
can someone please help me to calculate log base 10 in Verilog. What i need to do is to simply calculate the log base 10 of a variable n. Please help with testbench also.
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