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Recent content by pierre13

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    tcl : get all elements combinations from an input list of lists

    Hello, I would like to implement a Tcl code to get all the combination of elements of an input list of lists, such as : set combi_list { {a b {c1 c2}} {d {e1 e2 e3} f g} {h {i1 i2}} } I would like to get the combinations : a/b/c1 a/b/c2 d/e1/f/g d/e2/f/g d/e3/f/g h/i1 h/i2 Of course, the...
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    hspice vs finesim : Correlation study

    Hi !! You can compare .libs with siliconsmart (so just do the 2 characterizations, one with hspice and the other with finesim and then use this command) : compare_liberty The compare_liberty command provides a simple interface for reporting the differences between two Liberty files in terms of...
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    model card : simple resistor. Warning : select vamod for 'resistorcustom'

    Hello, I am defining a model card for a simple custom resistor : deltaV=R*I targetting a simulation in HSIM (Fast Spice simulator "coming from Hspice"). When I launch the simulation of my netlist : a circuit including this simple resistor custom, I have a Warning message. My goal is to...
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    Memory instance simulator settings : ULTRASIM/HSIM/HSPICE ...

    Hello, I would like to know what are the simulator settings you use for a "memory instance" simulation (transient simu of ~5ns), with just the checking of an output bit, for the sensing operation. My memory instance is a the smallest instance in terms of bitcells. It means it's "far" below...
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    IC Compiler : mapping pin (gnd <-> vss) for Synthesis & Physical implementation

    IC Compiler : mapping pin (gnd <-> vss) for Synthesis & Physical implementation Hello !! I have some std cells with the following pins : vdd, vnw, vss, vpw. FRAM views .lib Then, I have some other cells with the following pins : vdd, vdds, gnd, gnds. FRAM views and .lib I would like to make...
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    GDSII to FRAM view generation with Milkyway : issue Power/Ground port definition.

    Hello !! Does someone has already done a "from scratch Physical Library Preparation Flow" ? I am wondering why I cannot define the "layer pin M1 vdd/vss" I have in the CEL as Power/Ground port ? indeed, once I have created the CEL view, a get_ports or get_pins command doesn't return anything...
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    GDSII to FRAM view generation with Milkyway : issue Power/Ground port definition.

    Hi !! I have an issue when I want to define the Power/Ground Port in the CEL view, before doing the BPV (Blockage, Pin, Vias) with Milkyway or ICC. Milkyway> set_attribute [get_ports vdd] port_type "Power" Milkyway> set_attribute [get_ports vss] port_type "Ground" Warning: No port objects...
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    Creating a Reference Library for Astro

    Hi !! I have the same kind of issue when I want to define the Power/Ground Port in the CEL view, before doing the BPV (Blockage, Pin, Vias) with Milkyway or ICC. Milkyway> set_attribute [get_ports vdd] port_type "Power" Milkyway> set_attribute [get_ports vss] port_type "Ground" Warning: No...
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    Some problems in convert GDS to FRAM

    Actually, I think the right methodology is to consider the "M1 pin layer" for vdd/vss and not the "text pin layer", I have a CADENCE abstract view in a library which includes ONLY the "metal pin layer" and not the "text pin layer". Can someone help me to understand why I don't have the "metal...
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    Some problems in convert GDS to FRAM

    Hello !! I have also an issue when I want to generate the CEL view and then the FRAM view with Milkyway tool, from a layout.oa. -Step : layout.oa -> layout.gds is GOOD (done through Cadence, File/Export/Stream from layout.oa) -Step : layout.gds -> CEL view : when I open the cell, I don't...
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    Timing/constraint/mpw measurements in .lib for RETENTION Flip-Flop

    Hi !! Actually, the answer would be quite simple for someone who has a .lib from a retention library. Then, 2 options : - there are the timing measurements so it means it is handle by the characterization tool - there are not the measurements (why ? Does the power-down/wake-up strategy...
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    Timing/constraint/mpw measurements in .lib for RETENTION Flip-Flop

    Hello, using a characterization tool I am defining the measurement results to be written in a .lib for the RETENTION cells. Example : RETENTION Flip-Flop (inputs : D, RET, outputs : Q, clock : CP). My question : what are the timing/constraint/mpw measurements in the .lib, and especially the...
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    siliconsmart : timing charac buff2 with spectre => .raw ok but no delay measurement

    Re: siliconsmart : timing charac buff2 with spectre => .raw ok but no delay measureme Actually I found that, step import, I have an info (in the log file) which says that the look-up tables in the generated instance file (buff2.inst) have a size 10x11 (slew x out_loads) instead of 7x7 in the...
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    siliconsmart : timing charac buff2 with spectre => .raw ok but no delay measurement

    siliconsmart : timing charac buff2 with spectre => .raw ok but no delay measurement Hello, I am using : SiliconSmart-2012.06-SP2 spectre version 10.1.1 32bit and I do the siliconsmart tutorial delivered in the install path : .../synopsys/synopsysinstaller/SiliconSmart-2012.06-SP2/tutorial/...
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    Acces to Flip-Flop internal node between master and slave (example : FRAM view).

    Yes, but in the LEF (and surely FRAM) there is also some obstruction part, so maybe this part description enables me to have the information ?

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