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Hello,
Yes vGoodtimes i trying just one write packet for to be sure. The DCI is enabled.
But this problem is very strange. Because in the same fpga design I can test several test pattern and the pattern below work, I write-read 128 Mbyte twelve times and this pattern work any error.
But with...
Hi,
I am new in DDR3 developments.
I am trying a brute force read/write DDR3 sequence. The test pattern is a 32 bits counter big endian. At first I write a one shot 128 Mbytes packet in then DDR3 and then I read them. This represents approximately one second of data storing. I remark that the 2...
Hello,
I use ddr3 micron mt41k256 on fpga board.
what is the number of write/read cycles in DDR3 ?
I don't know if this constraint exist in ddr3 like in flash memory.
Regards,
Hello,
I have a problem with copper shape on GND layer.
After place this copper shape or ground plane if I move vias or net on this layer this error appear “via to copper”.
I’m search how can set dynamic copper shape.
Currently I use tab « shape default » and set « copper » and « action...
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