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Re: Q about pipeline ADC
I see.:) Thanks a lot!
I am going to do a design project on low power pipeline ADC. Could anyone please suggest some good reading materials? I have analog design basic knowledge from graduate classes, but still don't feel very comfortable to understand all the ADC...
Q about pipeline ADC
I have a question about pipeline ADC.
What the "redundant bits" in multistage ADC or pipeline ADC. Is it intentionally generated or it's error? I am really confused when I am reading the stage optimization on pipeline ADC.
Thanks a lot !
Thanks for everyone's help! I think I found the answers from the paper. You can take a look if you are interested in this topic.
RF-CMOS performance trends
Woerlee, P.H.; Knitel, M.J.; van Langevelde, R.; Klaassen, D.B.M.; Tiemeijer, L.F.; Scholten, A.J.; Zegers-van Duijnhoven, A.T.A...
I was asked this question by someone. So I had the same doubts as you too, while I found a paper which defines the cut-off freq. as 2*pi*gm/C. C includes intrinsic input capacitance, parasitic gate-bulk capacitance, and the gate-source and gate-drain overlap capacitances. I want to know the values.
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