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Recent content by PauloSherring

  1. P

    3 phase Signal conditioning

    By the way, mismatches in those resistors at the imput stage will introduce measurment errors - ie will amplify CMV and . Is there a CI that have the whole thing implemented in silicon chip, with highly matched pairs? I just realized that this error won't be repairable with futher adjustments...
  2. P

    3 phase Signal conditioning

    ZekeR, I did as you suggested and it did, in fact, eliminated any voltage fluctuation. It is something I should have known, but I completly ignored. Thanks for the in sight. The circuit diagram is attached. Now, what about the CM voltage? Should I worry with it somehow? Paulo Sherring.
  3. P

    3 phase Signal conditioning

    Hi guys! I want to build a 3ph line - both wye and delta wiring - signal conditioner, for hooking up on a National Instruments cRio system. According to simulations on Orcad, I could use diff amplifiers with high input resistance (1M) and then trim the signal for calibration. But I am not sure...

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