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Recent content by patriot

  1. P

    Inductor at ANT input for EDS protection

    I met a strange phenomenon, the diode does not attenuate the output power and the clamping diode does not activate under the maximum Pout (I am sure), but the harmonics (odd number, such as 3rd, 5th, 7th....) will be worsen, What 's the reason?
  2. P

    LNA gate bias with resistor or inductor?

    Many thanks for volker's warmly disscussion! I will try to do EM simulation in place of TFR model. Thanks again!
  3. P

    LNA gate bias with resistor or inductor?

    Hi,Volker, thanks I thought SMD resistor may also has too much parastic capacitance and inductance, only the parastic indutance has no effect. In many cases, lambda/4 high-resistance T-line along with open stub is used for gate biasing. But in X bad, it is impossible to implement it on chip.
  4. P

    LNA gate bias with resistor or inductor?

    Hi,Volker: You mainly refer to parastic capacitance to substrate? In the resistor model, it is said that the parasitics become distributed in high frequency.It is suggested to use "thin film resistor" model (such as "TFR" in microstrip palette in ADS simulator), but i think this model is only...
  5. P

    LNA gate bias with resistor or inductor?

    Hi, guys: For an X-band MMIC LNA with phemt, can the gate be biased with TFR(thin-film resistor) instead of inductor & microstip, since the TFR can save much die area. I found the TFR model in the design kit is very different from resistor, E.G. a 20K ohm resistor will be no more than 1K...
  6. P

    Current bring down when low Vramp

    Hi,guys, measureing a GSM PA with low Vramp (0.5V) in burst mode, when RF source on, the current will be about 5mA less than quiescent current? But when Vramp>0.6V, the current will be reasonablly larger than quiescent current. Why ?
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    Help me design a LNA in 0.18um technology and in 2.4GHz with ADS

    Re: LNA Design There is LNA example in ADS design guide, you can follow it
  8. P

    warning in 130nm IBM cadence

    It's the limit of breakdown voltage of gate oxide, you can find it in design manual
  9. P

    why my PA power increased very quickly?

    You can measure Pout by SA, to confirm is it because of harmonics or gain expansion, Gain expansion is a nature of PA ( mainly related to bias),
  10. P

    why my PA power increased very quickly?

    because of gain expansion? I am not sure.......
  11. P

    GSM PA burst Pout is not regular

    gsm pa The GSM PA in burst mode has an irrugular Pout shape as the attached pic., Could anyone explain it? Thx a lot!
  12. P

    LNA for DBS LNB design?

    related:www.earf.co.uk/sat.pdf Maybe I didn't make myself been understood clearly, I want to design a Low noise transistor to take the place of ATF36077 or NE3210, So i chose a pHEMT with width of 50um×4, however, the K factor is less than 0.3 ( but the ATF36077 or NE3210 has a much larger...
  13. P

    LNA for DBS LNB design?

    ne3210 amplifier Thanks for your reply. I don't know whether the LNB vender use some LNA MMIC or not, By far, the LNA MMIC with lowest NF which I can find in productions is tga2600 from Triquint. It has NF<0.7. Here, I want to disscuss how to design a low noise transistor like NE3210 or...
  14. P

    LNA for DBS LNB design?

    lnb transistors yes, your links are LNA products info., Since we must use two or three stages of the low noise transistors to construct the LNA, why don't they provide the MMIC with sufficient gain for DBS-LNB? hence it is more convenient. BTW, do the transistors such as NE3210, have...

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