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Recent content by PatrickChen

  1. P

    good Commercial IPs needed

    If just for study, you can visit this site for free IP: https://www.opencores.org/
  2. P

    How to fix it? AnalogLab problem

    Please check your environment setting, such as library path. or your symbol library is not completed.
  3. P

    tools for digital ic design in window env

    Coding: UltraEdit Simulatiion: Modelsim Waveform viewer: Debussy nWave Debug tool: Debussy Synthesis: Synopsys Design Complier
  4. P

    Debvssy error - incorrect translating

    Maybe is Debussy's bug, ask the AE for this problem.
  5. P

    USB2.0 Hub Verilog or VHDL model needed

    usb 2.0 verilog It hasn't the USB 2.0 Hub Model.
  6. P

    how to integrated PLIs with ncverilog?

    You can use the dynamic linking method.
  7. P

    How to make evaluation version of Xilinx ISE 5.1 into full ?

    To find the keygen, and re-install by enter the registration ID.
  8. P

    who has license for ambit under linux?

    Yes, you can download from ftp.cadence.com/drac_japan/
  9. P

    point me to a linux PT d/link please

    ftp.synopsys.com/pub/pt_vT-2002.09-sp1.old
  10. P

    PC Card Electrical Specification

    I got the Electrical Spec., but some waveforms have been damaged (ex. Fig.4-2 read timing diagram), does any one has the correct version?
  11. P

    any guideline about design reuse?

    I am also recommended this book " Reuse Methodology Manual for System-On-A-Chip Designs", maybe you can find it on ebook download/upload fourm. Good luck.
  12. P

    How to calculate the toggle rate in ncverilog

    How to calculate the toggle rate in ncverilog?
  13. P

    Any screen capture tools to capture my waveform ?

    HyperSnap DX is a good tool for snap.
  14. P

    Verilog to C++ Converter program

    Does it support all the syntax of verilog?
  15. P

    Help about netlist translation

    You need specified the synthesis library to xilinxun library.
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