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Recent content by Pape_4

  1. P

    vhdl (counter and comparison) exercise

    Could you tell me what changes if i want my output pattern to be : 1111000011110000
  2. P

    vhdl (counter and comparison) exercise

    If you become a little more sense would be better! I'm still low on digital design! and not understood very well what you mean! Thank you for your interest and prompt reply!
  3. P

    vhdl (counter and comparison) exercise

    Hello I am new to forum.. I'm student and i have to solve an exercise with vhdl. Ι am trying to create a circuit that on the output brings the pattern 0000111100001111.. with a clock input! My first thought was to create a counter mod3! I await your answers! Thank you!

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