Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by panpan

  1. P

    Question about noise figure in an amplifier

    Re: noise figure The NF and gain are all recieved under a certain input & output impedance. If you change its impedance without modifying your circuit, the gain and NF will be deteriorated greatly.
  2. P

    LNA power gain in RFIC 0.18um processor

    make accurate impedance match
  3. P

    varactor simulasion on @DS

    You may regard a common MOSFET as a varactor, connect the MOSFET drain, source and bulk together(for example, as B), then this two ports(the gate and B) device is a varactor. Simulate it with S-parameter, you can get its C-V and Q-V characteristics. ADS example "MOS_VCO_prj" has a design...
  4. P

    What is the best tools to simulate PLL?

    Maybe you could try ADS. You can do "envelop" analysis in ADS, by which you will get the time domain and frequency domain perfomance quickly and synchronously.
  5. P

    Need a paper by Hajimiri, thanks.

    A.Hajimiri and T.H.Lee,"The Design of Low Noise Oscillators", Kluwer Academic Publishers, 1999.

Part and Inventory Search

Back
Top