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Recent content by palanis29

  1. P

    Masking is not happened during atpg simulation

    hi, am doing ATPG & simulation using mentor. am getting mismatch during simulation which the failing flop is already masked during ATPG. i gave comment as add_cell_constraint <flop> DX & its is applied. can u help me?? is there is any option to mask pattern??? thx,
  2. P

    unresolved module error

    hi, am using vcs for simulation... during elaboration am getting unresolved module error.. can anyone help me, Regards, palani
  3. P

    what is spyglass check??

    https://vlsi.pro/linting/ actually i did't know about linting before, now i can know that spyglass is the tool to do linting.
  4. P

    what is spyglass check??

    i just want to know about spyglass check.
  5. P

    parallel chain and scan simulation

    how the parallel chain & parallel scan simulation works?
  6. P

    parallel chain and scan simulation

    Re: dft simulation error debugging is there is any logic reason is there????
  7. P

    parallel chain and scan simulation

    dft simulation error debugging hi, am new to dft field, i did simulation chain & scan, chain passed, but in scan simulation parallel passed but serial is failing. pls help me to fix this. thanks & regards, palani

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