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Recent content by Octago

  1. O

    does "Phase Margin" exist in circuits without feed

    For a circuit without feedback If plotting its Bode Diagram: GAIN=20log(out/in), PHASE Is there also a phase margin here? If it is, what does this phase margin mean? (As in a feedback loop, the phase margin of the loop gain means the stability problem)
  2. O

    Does the circuit without feedback have poles?

    thank you very much But could you please explain it in some more detail?
  3. O

    Does the circuit without feedback have poles?

    Hello Everyone, the stability problem(such like poles and so on) normally only exists in closed loop circuit? But if there is a circuit without feedback, does the stability problem still presents? Are there still poles?
  4. O

    prepare for analog interview?

    Hi guys, now i am preparing for analog interviews. I am quite familiar with the basic strcutures. But regarding the frequency response and the compensation stuff, I am not that good, because I'd never worked on it by myself before. Because now I can't have that much time to digest a big book...
  5. O

    triad region vs. linear region vs. subthreshold region

    Hi, everyone I am a little confused about the concepts and the characteristics of the different MOSFET operation regions. for MOSFET operating under saturation region it is called triad region under certain condition, the MOSFET can be used as a resistor, so it is also called linear region...
  6. O

    usage of the terms : IC; ASIC; FPGA

    just a general question which I am always not quite sure :| the full-custom integrated circuits (for example which are designed using Cadence) can be called as ASIC. But does digital circuit on FPGA also belong to ASIC Hope to hear some clear explaination :D thanks
  7. O

    Looking for some guide to 90 nm CMOS design

    Now I've just gotten the design kit of 90 nm CMOS and I would like to try some circuits for interests. But I am not familiar with high speed CMOS design, therefore, could someone give me some guide, nowadays, what are the interesting research topics in 90 nm CMOS design, in analog domain or...
  8. O

    How to edit the figures of simulation results from Cadence?

    now I want to use the simulation results from Cadence in the document, but these graphic output of cadence don't look very good. I am thinking how can I edit these graphics to make them look more professional. For example, is it possible for me to first export the simulation results into some...
  9. O

    feedback amplifier with capacitive load tends to oscillate?

    load tends Suppose now there is an amplifier with negative feedback loop. If this amplifier has a capacitive load, is this circuit susceptible to oscillation? and why? If yes, what is the correlation between oscillation and the value of this capacitance? thanks
  10. O

    Could this circuit be used?

    Do you have some reference document(for example. paper) of oscillator or monostable pulse generator based on this circuit? thanks
  11. O

    Could this circuit be used?

    thanks a lot! But I still have not understood why is this circuit a positive feedback. Could someone explain it?
  12. O

    Could this circuit be used?

    why is it a positive feedback loop? Normally the positive feedback should be avoided in the circuit design, shouldn't it?----It seems like this circuit is not a good design thanks very much
  13. O

    Could this circuit be used?

    A circuit which is consisted of a PMOS and a NMOS connected together (please see the attachment) This circuit seems a little strange to me, because I've never seen such kind of circuit. I am wondering if such combination of PMOS and NMOS transistors can be used ? If not, are there negative...
  14. O

    After this differential amplifier, is a buffer needed?

    Yes, the output buffer is a common source amplifier, I have written something wrong. Thanks I would like to have the output voltage range up to the supply voltage VDD, and I've simulated the amplifier A without buffer, the output is limited up to 1.8-1.9V If the buffer is also included, could...
  15. O

    After this differential amplifier, is a buffer needed?

    Hello All, A differential amplifier is implemented in my circuit( please see the picture in the attachment). The amplifier shown in the attachment is composed of a differential-input single-ended transconductance output stage and a source follower as buffer. 1, In my application, this...
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