Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by OB_1

  1. O

    Terminal window customization

    Hi guys, is there anyone knowing how to set the default shell terminal window in Virtuoso to gnome-terminal, in place of the usual xtem? Thanks to everyone reading this.
  2. O

    ADE XL – History files

    Hi guys, I was wandering if anyone has ever dealt with history file of ADE XL of Virtuoso by Cadence. These files are stored in the folder <library>/<cell>/adexl/test_states/<library>/<cell>/spectre/ I wanted to add another history file from another view of the same cell, so I just copied at the...
  3. O

    ADE XL – History files

    Hi guys, I was wandering if anyone has ever dealt with history file of ADE XL of Virtuoso by Cadence. This files are stored in the folder <library>/<cell>/adexl/test_states/<library>/<cell>/spectre/ I wanted to add another history file from another view of the same cell, so I just copied at the...
  4. O

    Plain Old Telephone Service and xDSL signals

    Thank you guys, I've already worked on that stuff, but I really need to get in-deep details. Thanks anyway :-)
  5. O

    How to amplify Hall Effect Sensor Output

    I've red now your post, and may be you have already solved all the problems you were facing, but anyway, will you find useful a simple project for the readout of an Hall magnetic sensor?
  6. O

    Plain Old Telephone Service and xDSL signals

    Thanks mvs sarma, I already gave a look to ETSI and ITU recommendations, but they give a general guideline without entering in the hardware details. I found something in the applications notes of some companies delivering SLIC (Subscriber Line Interface Circuit) and SLAC (Subscriber Line Access...
  7. O

    Plain Old Telephone Service and xDSL signals

    Hello everyone, I'm asking if anybody can refer me to some technical documentation on how the plain old telephone signal and the xDSL signals are mixed together and driven on copper pairs from the central office to subscriber and vice-versa. Any source would be fine: web sites, books, societies...
  8. O

    [SOLVED] Tunnel diodes use and spice model

    Again, thanks for the hint!! - - - Updated - - - Dear unkarc, thank you very very much for the very useful suggestions. I'll try with the lambda diode first, and perhaps order some discrete tunnel diodes. Bye! OB_1
  9. O

    [SOLVED] Tunnel diodes use and spice model

    Thanks a lot ahmad, that's a starting point!
  10. O

    [SOLVED] Tunnel diodes use and spice model

    Hi guys, have anyone ever dealt with tunnel diodes? If yes I'd like to ask you few questions about that: - where can I find this devices? I found some sellers, but no datasheet, and I found some datasheet but not the seller. I found some tunnel diodes on ebay, but in any case they all seem...
  11. O

    [SOLVED] Orcad PSice Creed Z-FET models

    Dear abhajn, thank you very much for your help. There were some other troubles in the .lib file, but I managed to fix them … partially: I’ve made the same changes described in your previous post for the second component of the library and it works!! So really thanks, because I would not have...
  12. O

    [SOLVED] Orcad PSice Creed Z-FET models

    Thanks a lot for the replay. I have modified the .lib file following your hints, but unfortunately it doesn’t fix the problem: - deleting tc1 and tc2 parameter could be useful, but is it sure those numbers are not needed? - using curly braces {af1} gives a error stating that “ …there is no...
  13. O

    [SOLVED] Orcad PSice Creed Z-FET models

    Orcad PSpice Creed Z-FET models Hi everyone, I’m having troubles using PSpice models of the J-FET built by Cree. After importing “.lib” and “.olb” files the simulation stops with the following: Has anyone ever faced this issue yet? Thanks a lot!
  14. O

    [SOLVED] Usage of different design kits in the same schematic

    I’ve claimed to the fact that even if you succeed in using two different PKD (Process Design Kit) in the same schematic and layout, the foundry won’t be able to made such a chip. Thanks anyway! Good job!
  15. O

    [SOLVED] Usage of different design kits in the same schematic

    Hi guys, could anyone tell me how to use in the same schematic instances of two different deign kits? I'm using Cadence Virtuoso 6.1 Thanks in advance!

Part and Inventory Search

Back
Top