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Microcontroller FPGA
hi
I think the best for learn FPGA perfectly is involve whit high level FPGA project and study instruction index and rules in verilog or vhdl that you have to concept about complicate algorithm
i learned that with same way very strongly
i suggest you verilog and work...
Re: Warnings when simulate
hi
ISE 10.1 has some problems like that
i thing that problem take place from ISE update files
i suggest you to use ISE 9.1
good luck
verilog io testbench
i synthesize your code in xilinx ISE 9.1 and simulate by modelsim and i saw no ploblem but
i change your codes with remove codes below:
wire x;
wire y;
reg sum;
reg carry;
thats enough to define
input x;
input y;
output sum;
output carry;
i saw the same error...
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