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Recent content by nitin4u7865

  1. N

    doubt about static timing analysis

    If we have big Soc, how we will go for synthesis and sta? How we manage constraints at both Top-bottom and Bottom-top approach? I am quite confused? kindly help me out with.. Thanks in advance
  2. N

    doubt about static timing analysis

    Thanks Kevin, But is it right option to say "slow down the clock" for set up violation? Regards,
  3. N

    doubt about static timing analysis

    For Set and hold violation what suggestion we can give to PD team ?
  4. N

    doubt about static timing analysis

    Anyone can let me know,what type of suggestion is provided to PD team by STA engineer after analysis?
  5. N

    Topics needed for Phd in vlsi in front end side...kindli guide me

    Topics needed for Phd in vlsi in front end side...kindli guide me
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