Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Recent content by Nirmol

  1. N

    what is open drain in cmos?

    can you pls also explain WIRE OR and wire ANDing in open drain cmos ?? how this mechanism helps is selectin of slaves in I2c ??
  2. N

    what is open drain in cmos?

    thanks for the reply!! if i am getting you .. i think you mean to say in cmos drain of pmos tarnsitor is left open . Now when gate voltage is applied and if i want to use open drain terminal as output i need to connect an pull up ressitor between pmos dran and vddand then nmos wil drive the...
  3. N

    what is open drain in cmos?

    what is open drain in cmos....explain with some diagam as its very confusin4 me and most imp ques is how it use in selecting multi master in a bus.
  4. N

    Diffrence between DSP Processers

    wt are fixed point and floating point DSP Processers
See more

Part and Inventory Search

Back
Top