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CoIDE 1.4.1 Update - M4 and GCC ARM Embedded supported
For more info, please visit http://www.coocox.org/CoIDE/CoIDE_Updates.htm and http://www.coocox.org/CooCox_CoIDE.htm.
Parts of CoIDE User's Guide have been updated online.
How to Add FTDI-based Adapters
Many adapters use FTDI FT2232 or other similar chip as MCU. CooCox Users can customize FTDI-based adapters.
The attachment is a guide for adding FTDI-based adapters to CoIDE and CoFlash:
Visit http://www.coocox.org/CooCox_CoIDE.htm /...
【FAQ】How to use C++ in CoIDE
Users asked on CooCox Forum now and then if CoIDE supports C++ or not.
Well, CoIDE supports only C language by default. *.cpp or *.C (a capital letter) files in CoIDE projects will not be compiled. What a pity!
Fortunately there are always more solutions than...
CooCox has implemented NUC122 CoX Peripheral Interface
CoX, the Uniformly Defined Driver Interface based on ARM Cortex M3 and Cortex M0, the Driver Repository CooCox Team has been sparing no efforts to construct, was introduced before.
Currently the main developers of CoX are CooCox engineers...
CoAssistant, Your Effective Assistant on Register Info
Do you still refer to user manual now and then when programming? It’s outdated!
Now you have run into a good assistant with fortune, who will considerably lighten the burden of your eyes.
CooCox CoAssistant is a handy and practical...
General Mobilization of CoX Development
CooCox has spared no effort and spent one full year to rewrite CoX, the Uniformly Defined Driver Interface based on ARM Cortex M3 and Cortex M0, as I introduced in my former post.
The good news I’d like to inform you today is that CooCox has built up CoX...
CoIDE Semihosting instructions for users
To use the function of Semihosting, you need to:
1. Select component Semihosting in Repository page;
2. Enable Semihosting in Debug Configuration;
3. Add SH_SendChar(c); to function Printchar() in file printf.c, and add #include "semihosting.h" to the...
It took a little longer than we expected to release CoIDE 1.3.1, due to several times of test and modification.
[CooCox CoIDE-Improved]
Added: Support Semihosting function
Added: Support NuVoton NUC122 series
Updated: The components and examples for Nuvoton's NUC1xx series, M051 series...
CooCox has optimized COX --- ARM Cortex M3 & M0 library and the Terms of Use
COX V1.0.0 was released in September 2010, and has been ported to several MCU platforms, such as LPC11xx, NUC1xx and so on.
COX V1.0.0 also provides a group of common functions for peripherals, but it has some...
CoIDE 1.3.1 will be released next week
CooCox will release CoIDE 1.3.1 next week, with bugs mentioned above fixed and semihosting function added.
CooCox have updated the Nuvoton cmsis library and corresponding examples.
How to update components?
Click “Refresh” button in the top right...
How to Debug in RAM in CoIDE 1.3.0
CoIDE 1.3.0 has added “Debug in Flash” and “Debug in RAM” options to file build.xml.
“Debug in Flash” is by default. To debug in RAM, you need some extra settings. For different chips, the settings are different.
For instance,
STM32F10X series
In function...
Notice when using J-link editing script function and Include Paths
CoIDE V1.3.0 has firmed the init-script of debug (including Reset Mode and Run to main option) to code, so the Edit scripts box is empty, and users only need to fill in some GDB settings script.
The Other-adapter option was set...
For more details, you can refer to CoOS User's Guide and three articles-
CoOS Real Time Kernel (CooCox.org)
CoOS Real Time Kernel (CooCox.org)
CoOS Real Time Kernel (CooCox.org)
Changes about J-link, Include Paths and MDK projects in CoIDE 1.3.0
Hi All,
1. Many users of CoIDE 1.2.5 fed back that they couldn't use J-link due to the limit of J-link licence and jflash script. Thus in the new version, we modified J-link debugging part, so that a program can download...
CoIDE V1.3.0 has been released
Due to the adjustment of structure, the new version CoIDE has entered the V1.3 age, instead of V1.2.
[CooCox CoIDE-Improved]
Added: Supported: NXP's LPC1200 series, some chips of TI and NUC130 and NUC140 series
Corrected: Modify names for Nuvoton chips
Added...
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