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Recent content by neopisha

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    CompactPCI Altium Template

    I know how to draw a board and connector. In these templates, everything about sizes and handles are done and it can save a lot of time. Thanks for your reply but it didn't help.
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    CompactPCI Altium Template

    I am looking for CompactPCI Peripheral 3U (Item: PDE-0001-00069) and CompactPCI System 3U (Item: PDE-0001-00083 ). Anyone can help and upload these templates?
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    PCIe 1x card template for Altium

    I am looking for CompactPCI Peripheral 3U (Item: PDE-0001-00069) and CompactPCI System 3U (Item: PDE-0001-00083 ). Anyone can help and upload these templates?
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    Altium PCB file to Mentor PADS translate

    I want to open it in PADS Router. How could I save to Layout file from hyperlynx? By the way, hyperlynx translates Altium files fine.
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    Altium PCB file to Mentor PADS translate

    I want to translate an Altium PCB file to mentor pads. I used PADS Layout Translator 2007 but when I open the results in PADS, There are just some crosses and nothing is visible. I have try it with PCB v4. Newer versions are not supported with the translator. Mentor Hyperlynx has a translator...
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    Agilent ADS layout - how to properly insert a via hole

    I want to simulate a multilayer PCB in ADS too. Could anyone please suggest some tutorials on ADS signal integrity? I have reviewed the PCIe example but got nothing!
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    Signal Integrity Problem with DDR2 SDRAM and DSP in Altium - Top Signal Level value

    I have simulated the clock net for a mobile DDR in both CST and Hyperlynx and got 2 different results! Here are the wave forms of both: From the Hyperlynx results there are bad ringings but in the CST waveform of the same net, everything is just fine! There is just a 10 ohm series termination...
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    Signal Integrity Problem with DDR2 SDRAM and DSP in Altium - Top Signal Level value

    Thank you abaz. I start to work with CST, it is capable of 3D analysis and I think it worth some try. I get some answers but still needs some work on CST. Also I start to work with Mentor PADS v9.4 and it can import Altium pcbdoc files so no more need for script. Thank you very much. If I face...
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    Signal Integrity Problem with DDR2 SDRAM and DSP in Altium - Top Signal Level value

    Thank you abaz, I've checked and there was nothing!!! I am really confused. I'll make a new project with just memory and the controller and try it again. Maybe I'll change the Altium version. Have you ever tried other softwares for SI? I looked in CST but it is very complicated!
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    Signal Integrity Problem with DDR2 SDRAM and DSP in Altium - Top Signal Level value

    I have deleted the extra Supply nets rules and just keep 1.8V and GND. But the result did not change.
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    Signal Integrity Problem with DDR2 SDRAM and DSP in Altium - Top Signal Level value

    This is a board with FPGA and DSP and there is 4 voltage rails for FPGA and 5 for DSP and 1 for 0.9V DDR VTT and one aux 5V. If all of them are not necessary I should delete them? The updates are just fine, everything is updated correctly, I'll delete extra supply net rules and perform SI again.
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    Signal Integrity Problem with DDR2 SDRAM and DSP in Altium - Top Signal Level value

    Is there anybody with Signal Integrity Experience? Here are some shots: It is DDR2 Signal Integrity Model Editor in Altium. I have changed the Supply Voltage from 5V to 1.8V. All of them were 5V! I have check the IBIS model and there is nothing wrong with it. In the resistance/capacitance...
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    Signal Integrity Problem with DDR2 SDRAM and DSP in Altium - Top Signal Level value

    I've done all the steps you mentioned and I still get 5V for TOP Value. I've checked the IBIS model from schematic properties in Altium, Power Voltage and Supply Voltage are set to 5V!!!! I think I should change all of them one by one or is there any other way?
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    CST Microwave Studio - 2011

    I have the same problem. ---------- Post added at 15:23 ---------- Previous post was at 15:21 ---------- Just found from https://www.sonsivri.to/forum/index.php?topic=21273.0 For windows: Start -> Programs -> CST Studio Suite 2009 -> CST update Manager Import, browse for the .sup, install.
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    PIC18F87J60 Ethernet Receive Problem

    RX LED works fine which means the PHY get the data but in some way in could not pass the data to the processor and also means there is no problem with magnetics which are integrated in RJ45 connector. I do all the recommended settings for the Ethernet module registers. TX interrupt works...

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