Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
hi
i want to implement a simple logic circuit in CPLD (XC9572) which does this operation (1/X + X * 4 ) . what is the efficient way of calculating 1/X. X is a 12 bit number.
I already done the multiplication part but don't have any ideas about how to efficiently do the 1/x part. should I go for...
i think if the output ports are assigned to some input pins in that case chipscope can track them, I'v done this to verify the signals on Ethernet phy layer chip,
if you want to verify all by software then I think chipscope is the way to go, otherwise you need logic analyzer to verify signals.
i used the Eagle4-1.ulp in eagle 6.2 soft to convert my eagle pcb to altium designer pcb, but the problem is that in the converted pcb file the signals and pads on top and bottom layer became multilayer and everything is messed up :( any one knows what's the problem? any solution to convert...
you cannot use unsigned char in function calls , in
send_bit(unsigned char bit_out );TX_byte(unsigned char Tx_buffer );
must be
send_bit(bit_out );TX_byte(Tx_buffer );
and in defining local variable,it must not be the same as function input parameters
unsigned char RX_byte(unsigned...
hi
i have two interrupts in my project, i have priority high for interrupt 1 and priority low for interrupt 2. the issue is when low priority ISR is being executed if interrupt high priority occurs it is not executed immediately.
what i want is that interrupt with high priority being executed...
hi
i am trying to protect read flash content of my project which is on At91Sam7x512 with keil. is it possible to read flash content memory through jtag?? if so how should we lock reading from it? what about other programming tools such as samba?
tnx
is it possible to have a bus topology with a phy layer chip which is compliant with ieee802.3 standard? i want to put the phy chips(rtl8201) on the same cable, the speed is not important , only shared medium is important for me.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.