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Recent content by nagssmiles

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    Power estimation at LOGIC level

    Hello Sir/Madam, I have a verilog file, I have to find the power dissipation of the circuit at gate level. Can anyone suggest me which software is helpful in finding the power dissipation of the circuit at gate level. Please give me the details how i can use that software to find power...
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    Verilog to SPICE netlist conversion

    Hello, how can i convert a verilog file into spice netlist format. I have CADENCE software, I tried to import verilog file and export in spice netlist form, but I am facing some difficulties. Can you suggest me any other method.
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    PrimeTime Vs primeTime SI help

    sory i dint get u........PM means????my mail id is nags.snist@gmail.com
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    PrimeTime Vs primeTime SI help

    yaaaaaaaaaaaaaa thanq very very much.....the information u hav given is very useful & if u dont mind can u giv me ur mail id......so dat if i get any doubts i may mail it to u
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    PrimeTime Vs primeTime SI help

    hiiiiiiii....i am new to prime time......i need to calculate the power & delay of the logic circuit which i hav....i hav simulated it in xilinx....the vhdl code is working properly bt we cant find power dissipation in xilinx na dats y i am gng for primetime tool for finding dem.......can anybody...
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    ASIC Design Methodologies & Tools (Digital)

    sorry sir......the link u sent is unable to get connected.......it is dispalying as page is not found ---------- Post added at 08:40 ---------- Previous post was at 08:37 ---------- i hav simulated my code using test bench & it is working properly and i am getting the correct outputs......now...
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    ASIC Design Methodologies & Tools (Digital)

    thank u sirrrrrrrrrr. the information which u hav given is helpful.what is the next step i hav to do after having my vhdl code. whether there is any different coding style for prime time or can it be generated from the vhdl code itself.....pls give me commands if so......plsss plsss sir its...
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    ASIC Design Methodologies & Tools (Digital)

    how to write program in primetime.mow i am having the vhdl code.from that code how to write prime time code for finding power dissipation & delay
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    ASIC Design Methodologies & Tools (Digital)

    plss can anybody send me the free download link of power compiler or any other tool which calculates the power at gate level design....thanks a lot & a lot......thanks thanksssssss...i wil be thankful to all of u....pls plsssss
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    ASIC Design methodologies & tools

    plss can anybody send me the free download link of power compiler or any other tool which calculates the power at gate level design....thanks a lot & a lot......thanks thanksssssss...i wil be thankful to all of u....pls plsssss
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    Vhdl programming& simulations

    how to find power dissipation in vhdl programming

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