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Good morning everyone!
The project is finally finished. In the end I decided to design everything for a 1pF load capacitance and to use a two stage miller opamp.
The DAC is working and the Professor said that it was good anyway, even if not all the specs were satisfied.
Many thanks to everyone...
I was referring to the OPAMP circuit, but you are right, the "OPAMP" word describes just the bare OPAMP.
Thanks for claryfing it, technical language is important and I'll definitely put more attention on it and use the word in the right way in the future
Yes, it is right, same topic but...
Dear Klaus,
Alright, clear. But isn't the opamp I have to design, in this particular case, acting like a single pole system?
And so, because of that, it'll have the frequency beahviour of an LPF, which means that it'll have a cutoff (or corner or -3dB) frequency in correspondition of the said...
Dear Klaus,
First of all, thanks for your reply. I'll start from the last question.
The value of 1us is given from the specs that the company gave to us. The text that gave to us says:
Design a multichannel 12 bit DAC with the following specs:
1) 5 output channels
2) Vdd = 1.8V
3) SPI as...
Hi everyone! I think I finally solved (almost) all the specs doubts, if someone can give me confirmation it would be really helpful :) my digital part of the project is ready and working, so now it's only a matter of designing the opamp in the correct way.
Looking at the specs, for the amp I...
Dear jjx,
First of all, happy holidays!
I had the chance to have a meeting with my professor, he told me that the specs are not wrong, he said that everything looks ok to him. But, I still have doubts.
I started to do some calculations and, as you said, the situation looks strange.
I'll start...
Dear jjx,
Thanks for your reply, I'll try to answer to everything. I forgot to specify that the project is given from a company, reviewed by the professor and then sent to us. For this project in particular, the application would be the use of the DAC in implantable devices used for the...
Dear forum users,
For an exam about mixed state circuits, I have to design a 12 bit DAC in Virtuoso with some requirements:
1) 5 output channels
2) Vdd = 1.8V
3) SPI as interface (with 20 MHz clock), which can be made as a testbench
4) update rate (per channel) of 1KS/s
5) Settling time (1%)...
Hello, I'm writing a little report about an UWB antenna in the 3-6 GHz spectrum. The last point of the report says to calculate the Phase Center of the antenna and watch how it changes with the frequency. I tried to use the post-processing tools and I've been able to use "Export Phase Center" at...
Hello, I'm doing a research about some old Agilent/HP ATFs that have (probably) been counterfeited. I'm searching for these two old designer's catalogues, one by Agilent and one by HP:
Communications Components Designer’s Catalog. Hewlett Packard. 5966-0895E (9/97)
Semiconductor Products...
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