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It should be a n-well ring connected to the deep n-well, not just a single contact as in your layout.
In Cadence, I remember there is a switch in the parameter file to turn on the extraction of the well diode, you don't need to add the diodes on your schematics if the switch is not on (default...
This is your circuit and no one can debug your circuit better than you do. If you insist this a a bug from Cadence, I think you better email them.
What I can say is I don't see a normal start-up circuit in your last schematics. I don't think I have more comments to add.
Remember to do the...
Thanks for the reply. I ask, what kind of hand calculations? To implement the start-up cricuit? I haven't found any kind of literature reference on how to do this. The rest is simple.
- I meant the calculation of the output current.
However, even though, as you say, that the circuit is...
Clearly, your amplifier is driving pA current and not working. The VBE of the npn transistors is 70mV, what are you expecting actually? And where is the compensation capacitor? It seems to me that you change the start-up circuit, and I suppose it is not working also.
Again, I suggest you to do...
Don't think this is Cadance's problem and my experience tells me not to suspect the simulator. Show me your DC simulation settings and the schematic, otherwise I can't help.
I always suggest people to do hand calculations before designing, then you usually know if you are on track.
The BGVG has two operating regions, either idle (not sure if this is the correct work) or working.
In idle mode (before the BGVR starts up), all the nodes' voltage is either 0 or VDD; the gate voltage of NM28 is VDD. As a result, PM23 is turned on and the BGVR starts up.
The gate voltage of...
That pmos transistor is not part of the current mirror, and is only a pull-up device. The idea is that, after the BGVR starts up, PM27 sets the gate voltage to of PM23 to VDD. As a result, PM23 is off and draws no current.
First of all, how can you know "the current in the Pmos is reversed so the tool is rounding off the -ve current value to 0", have you checked the pmos leakage current in accumulation mode. Or checked the leakage current of the nmos?
Which nodes are you using? According to my experience, the...
Re: A Sub-μW Bandgap Reference Circuit with an Inherent Curvature-Compensation Proper
Downloaded the paper. New and interesting curvature-compensation idea. Nice MC simulation results, however, only five samples were measured.
Use minimum width for transistors on the left hand side, and set the length of the nmos as long as possible depends on your layout.
You many want to use cascode current mirror also. Can already imagine your circuit has large line regulation. Just found an interesting paper and you can find some...
If you doubt it is the start-up circuit problem, check the operating regions of the transistors and voltage at different nodes at the temperature not working.
Better analyze the problems a bit first before asking, this is one of the most important things for engineers.
Another possibility is...
Re: how to find the sizing of the capacitance for a 10 bit sar adc
Assume the offset is linear/insignificant (with offset-cancellation), the linearity is limited by the matching of the DAC capacitors and the DAC type (binary-/themometer-code). Binary type has fewer switches but larger DNL...
Most current-mode BGVRs can achieve reference voltage >1.2V. The most well-known one is: A CMOS bandgap reference circuit with sub-1-V operation, JSSC, May 1999.
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