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Recent content by mm6349

  1. mm6349

    HSPICE license server at each simulation?

    -- It depends on how many license tokens you have (on that license server). Normally, each running process will take one token. If you have only one license, it will have to wait for one simulation to finish. I am not sure how you run your simulation. mm
  2. mm6349

    testbench problems - outputs cannot obtained

    >>> when you run ModelSim and simulate the testbench, make sure you select the right module (testbench module) not the UUT (entity). So, you can see the waveforms. mm
  3. mm6349

    Problem in Displaying ADC Result into 7 Segment

    you need to read the datasheet first what is the output format. Basically, it is in binary, either in serial or parallel form. To display on seven segment display, you need to convert the format from binary to decimal form, use the circuit such as binary to decimal (BCD) conversion circuit. You...
  4. mm6349

    Free VHDL simulator -- ModelSim PE Student edition

    free vhdl simulator visit ModelTech website: https://www.model.com/resources/student_edition/student_default.asp mm/
  5. mm6349

    Xilinx FPGA Starter kit

    fpga starter kit You may need to check what you want to use the board for, as the two boards have different components, I/O connectors, displays, etc. Then you can find the one that suites your needs. mm
  6. mm6349

    can cadence ic5141 utilize the stand cell library to layout?

    basically you can instantiate the layout cell into your layout. However, your layout library should provide a full layout view (all GDS layers) in order to get all extracted devices. If the library only provide the blackbox view, you again extract the spice from the layout, but you can get the...
  7. mm6349

    How to interface Dracula with Tanner L-Edit.

    You may need to export the layout into GDS format and then import it to Virtuoso or run Dracula. You can also import Dracula rule file into Tanner/LEDIT and run DRC insite Tanner. mm Added after 16 seconds: You may need to export the layout into GDS format and then import it to Virtuoso or...
  8. mm6349

    standard cell library design

    Another source for std. cell development is www.vlsitechnology.org mm
  9. mm6349

    Porting FPGA IP Core to ASIC

    ASIC IP Core That's true.. if the number of unit less than 100k, the cost per unit will be very very high when using such advanced process due to a huge mask cost. For prototyping, of course, the cost of prototypes will be extremely high. But when it is in production, for example, 1 million...
  10. mm6349

    Is anyone here doing CMOS IMAGE SENSOR(CIS) design?

    I saw the sample design come wit the software Microwind (https://www.microwind.net/). Please check.. mm
  11. mm6349

    Can we use IC 5.141 to design a digital system ?

    You can use it to design digital system, but not as you want (HDL --> Syntesis -> Place and Route which require other set of tools). Nornally for IC5141, you have to draw the schematic (using the digital cell library), then create the layout using standard cells. mm,
  12. mm6349

    Looking for synthesizable VHDL /Verilog code for a simple adpll

    Re: code for adpll you may take a look on this website .. https://www-unix.ecs.umass.edu/~djasinsk/adpll.html I didn't test the code whether it is usable or not.. you can try and share your experience.. mm//
  13. mm6349

    A site for semiconductor design news in India

    This would be very great.. if someone could add similar website from their respective countries, such as China, Hong Kong, Taiwan, Malaysia, Singapore, etc.. mm,
  14. mm6349

    Simulate ESD devices!!!

    You can search the web about how to simulate ESD using TCAD tool. Here is the list of the TCAD website: • Synopsys (Technology CAD) **broken link removed** • Silvaco International **broken link removed** • TCAD International https://www.tcad-international.com/index_e.html • SEQUOIUA...

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