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Hi, after I designed and placed my geometry .py code into the file of "UserDefinedModels" of ANSYS electronics desktop, I setup the lumped port Excitations and the analysis setup.
The design passed the validation, but when it came to the analysis process, it reported the following errors...
Hi,
Recently I am doing the post_layout simulation. The av_extracted file generated by AssuraQRC is attached to the pre_layout schematic.
However, the simulation reported the following error (virtuoso ADE explorer):
According to the error, it seems that only the single-bit port is recognized...
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